Fault Attack on FPGA implementations of Trivium Stream Cipher

摘要

This article presents the development of an experimentalsystem to introduce faults in Trivium stream ciphersimplemented on FPGA. The developed system has made possibleto analyze the vulnerability of these implementations againstfault attacks. The developed system consists of a mechanismthat injects small pulses in the clock signal, and elements thatanalyze if a fault has been introduced, the number of faultsintroduced and its position in the inner state. The results obtaineddemonstrate the vulnerability of these implementations againstfault attacks. As far as we know, this is the first time thatexperimental results of fault attack over Trivium are presented.